Exploring the world's possibilities, bit by bit

Hi! I am a master's student studying computer engineering, focusing on low-power design through hardware-software co-design and making better system-level decisions. Please click below to continue.

Matrix convolution accelerator
Parallelized and fault-tolerant accelerator to process streams of matrix data and compute their convolution for a space computer system.

RISC-V PMU
Implementation of a performance monitoring unit for RISC-V cores to facilitate a top-down performance characterization.

Projects
Explore all my projects I have undertaken.